Part Number Hot Search : 
LT1208 ACX310AK SR6C6K40 245AD STTH3 DEVICES 07ATB DDLK0312
Product Description
Full Text Search
 

To Download VSC8228 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  VSC8228 features: 4 dual clock and data recovery architecture for gigabit ethernet and fibre channel applications 4 fibretimer? configurable clock recovery unit (cru): repeater, retimer, or bypassed 4 programmable input signal equalization, output de-emphasis, and output drive levels 4 analog signal detect and protocol monitor indicators 4 optional half-rate sgmii clock and repeated reference clock output 4 built in self test which can generate and detect an unframed 2^7, 2^23, and 2^31 pseudorandom bit stream (prbs), a user defined pattern, and the fibre channel crpat, cjtpat, and cspat patterns applications: 4 fibre channel switches, disk arrays, raid subsystems, host bus adapters 4 gigabit ethernet line cards 4 blade server backplanes specifications: 4 single 1.2 v and/or 1.8 v supply 4 10mm x 10mm 64-pin tqfp package 4 spi or two-wire serial interface 4 typical power: 360 mw dual channel multirate signal conditioner and retimer benefits: 4 provides fibre channel and gigabit ethernet signal conditioning, improving the signal integrity 4 offers flexible implementation. fibretimer in retimer mode minimizes the jitter generation, while maintaining high jitter tolerance. in repeater mode offers low latency signal cleanup. bypass mode allows support for rates in not directly by the cdr. 4 supports exteneded trace lengths over copper backplanes and cables, ideal for backplane and rack-to-rack applications 4 supports enhanced receiver diagnostic capabilities. 4 provides serdes to sgmii gigabit ethernet interface conversion. 4 enables comprehensive system diagnostic capabilities. the extended pattern support reduces the need for external test equipment block diagram: transport products pb-VSC8228-001 serial interface and control logic refclk VSC8228 los and protocol error logic los and protocol error logic cdr with retimer cdr with retimer pio0, m0, mosi, sda pio1, m1, sck pio2, reset, miso pio3, ssn pio4 pio5, m2 pio6, m3 rxrate0 rxrate1 rxrp appsel rxinp rxinn rxclkp rxclkn txinp txinn txasd txsdu txrate0 txrate1 txrp rxoutp rxoutn rxasd rxsdu rxasd rxsdu txoutp txoutn rxemp exoen
741 calle plano camarillo, ca 93012, usa tel: +1 805.388.3700 fax: +1 805.987.5896 www.vitesse.com the VSC8228 is a dual repeater/retimer for fibre channel, gigabit ethernet, sonet/sdh, and infiniband applications. the VSC8228 contains dual fibretimertm clock recovery units (cru) for bidirectional signal conditioning in system interconnect and serial backplane applications. the device supports rates from 125 mbps up to 4.25 gbps. using a single reference clock for acquisition, the VSC8228 retransmits the incoming serial data synchronously to the reference clock in retimer mode or to the incoming data in repeater mode. in the retimer mode, add/drop elasticity buffers insert/delete fibre channel fill words to account for timing differences in the incoming data and local reference clock. an analog signal detect function is integrated into both channels. in the retimer mode, the device monitors the incoming data for run-length violations and k28.5- symbols. the inputs on both the transmit and receive channels can be looped back to the outputs of the opposite channels for diagnostic purposes. the device provides a built-in pattern generator and checker. an optional half-rate clock for sgmii applications is provided on the receive channel output. a high degree of signal integrity is maintained via differential i/o, on-chip input and output terminations, input equalization, and output de-emphasis. the programmable input equalization circuit compensates for the frequency limitations of long printed circuit board (pcb) traces, backplanes, connectors, and cables. equalization, de-emphasis, output drive levels, data rate, and other features are configured through industry standard serial interfaces (two-wire or spi). the device may be powered from a single 1.2 v supply, single 1.8 v supply, or both a 1.2 v and 1.8 v supply. the 1.8 v supply is required to meet the lvpecl output swing levels. the device has current-mode logic (cml) inputs and outputs that can be ac-coupled for lvpecl and lvds compatibility. the ic is packaged in a compact 10mm x 10mm, 64-pin tqfp package. typical power dissipation for a 1.2 v supply is 360 mw. general description: application diagram: VSC8228 for more information on vitesse products visit the vitesse web site at www.vitesse.com or contact vitesse sales at (800) vitesse or sales@vitesse.com ?2005 vitesse semiconductor corporation vitesse, asic-friendly, fibretimer, timestream and snoop loop are trademarks of vitesse semiconductor corporation. all other trademarks or registered trademarks mentioned herein are the property of their respective holders. vitesse semiconductor corporation ("vitesse") retains the right to make changes to its products or specifications to improve performance, reliability or manufacturability. all information in this document, including descriptions of features, functions, performance, technical specifications and availability, is subject to change without notice at any time. dual channel multirate signal conditioner and retimer switch fabric backplane line card 8 2 2 8 c s v l a c i t p o e l u d o m h c t i w s c i s a


▲Up To Search▲   

 
Price & Availability of VSC8228

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X